MEMORY INDUSTRY INTELLIGENCE

Discover the Latest in CXL Innovations at DevCon 2025 - Compute Express Link

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The CXL Consortium held the first-ever Developers Conference last year, sharing the history of CXL and exploring the industry trends that continue to drive the evolution of our technical specification. The event also provided a unique opportunity for our members to learn directly from CXL technology experts.

This year’s event – taking place Tuesday, April 29 – Wednesday, April 30, at the Santa Clara Marriott in Santa Clara, CA – reflects the industry’s work in taking the technology and adoption to the next level. CXL DevCon 2025 is expanding to multiple presentation tracks with 35+ sessions featuring member case studies, diversity of CXL use cases, memory pooling and expansion features, RAS, testing & compliance benefits, and the future of CXL. Presentations will be delivered by CXL technology experts from our member companies, including [AMD](https://www.amd.com/en.html), [Astera Labs](https://www.asteralabs.com/), [Cadence](https://www.cadence.com/en_US/home.html), [Intel](https://www.intel.com/content/www/us/en/homepage.html), [Jackrabbit Labs](https://www.jrlabs.io/), [Microsoft Azure](https://azure.microsoft.com/en-us/), [Samsung](https://semiconductor.samsung.com/cxl-memory/), [Siemens](https://www.siemens.com/global/en.html), [VIAVI](https://www.viavisolutions.com/en-us), [ZeroPoint Technologies](https://www.zeropoint-tech.com/), and more.

**Day 1 Summary Agenda**(View the detailed agenda [HERE](https://computeexpresslink.org/cxl-devcon-2025/))

* Welcome and Keynote presentations
* Taking the Industry by Storm – Showcase presentation, technical training, testing and compliance update.
* Track 1: CXL in Action – Design tools, use cases in the wild, switches, DDR4 and DDR5 memory, testing and compliance fireside chat.
* Track 2: Expanding the CXL application – Thinking outside of the “Box” with CXL, CXL memory pool and sharing use cases, and collaborative use cases fireside chat.

**Day 2 Summary Agenda**(View the detailed agenda [HERE](https://computeexpresslink.org/cxl-devcon-2025/))

* Track 1: Memory Pooling and Expansion – Case studies of CXL memory pooling and memory sharing.
* Track 2: RAS, Testing & Compliance – A deep dive into CXL RAS and CXL testing and verification.
* CXL is Future Focused – Understanding trending industry demand, future of the CXL specification, audience questions and fireside chat.

For those who need to see it to believe it, Consortium members [Cadence](https://www.cadence.com/en_US/home.html), [Montage Technology](https://www.montage-tech.com/), [Panmnesia](https://panmnesia.com/), [Teledyne LeCroy](https://www.teledynelecroy.com/protocolanalyzer/summit-m616-analyzer), [VIAVI](https://www.viavisolutions.com/en-us), and [XConn Technology](https://www.xconn-tech.com/) will be demonstrating their CXL technology-based solutions for heterogeneous memory and computing solutions and exciting new applications in our Exhibitor Hall that’s expanded to nearly twice the size of last year’s exhibit area!

Don’t miss this amazing opportunity to engage with industry peers, hear the latest from our technical experts, leadership, and working group representatives, and discover the latest ecosystem trends at the event. Consortium members are invited to register [HERE](https://members.computeexpresslink.org/site/login?return=%2Fwg%2FCXL%2Fhome%2Fcxl-devcon-2025) to reserve a seat for CXL DevCon 2025 today.

We look forward to seeing you in Santa Clara!

**CXL DevCon 2025 Sponsors**